The present invention relates to a data converting device for converting input data such as image data or voice data according to a user's request, and more particularly, to a data converting device for converting data by employing a multitude of look-up-tables (LUTs) composed of converting data corresponding to input data.
In the conventional image output apparatus such as a color printer or facsimile, when image quality is compensated for brightness, contrast or tint by employing LUTs, an LUT for compensating each image characteristic, defined by each compensation mode, has to be stored in a discrete ROM. For example, when image quality is compensated by three kinds of compensation modes, three memory devices are needed for storing three kinds of LUTs.
FIG. 1 is a block diagram showing a data converting device using LUTs in a conventional color printer. First, second and third ROMs 12, 14 and 16 are memory devices for storing LUT data for each converting mode. First, second and third latches 11, 13 and 15 latch the data input to each latch so as to output the latched data in accordance with a clock signal. First and second delays 17 and 18 generate a delayed clock signal for controlling latches 13 and 15 connected to the output of ROMs 12 and 14 respectively.
When input data 101 is input periodically, first latch 11 latches input data 101 and outputs the latched data to first ROM 12 in accordance with clock signal 110. Output data 102 from first latch 11 serves as a lower address of first ROM 12. First condition data 107 determines a converting level with respect to the LUT stored in first ROM 12 and serves as an upper address of first ROM 12. That is, an address for accessing first ROM 12 consists of a lower address, i.e., output data 102 of first latch 11, and an upper address, i.e., first condition data 107. Data 103 output from first ROM 12 is data which is converted by a first LUT according to input data 101 and first condition data 107.
A first delay 17 delays clock signal 110 by a time period equal to the time delay between the input and output of first ROM 12 and generates the delayed clock signal 111 to be output to second latch 13. Second latch 13 connected to an output of first ROM 12 outputs to second ROM 14 the latched data 103 output from first ROM 12 according to the delayed clock signal 111. An address for accessing second ROM 14 consists of a lower address, i.e., output data 104 of second latch 13, and an upper address, i.e., second condition data 108. Data 105 output from second ROM 14 is data which is secondly converted by a second LUT according to second condition data 108 and data 104 which is firstly converted by the first LUT.
Second delay 18, third latch 15 and third ROM 16 operate as described above. Then, the data 113 thirdly converted by a third LUT of third ROM 16 according to the secondly converted data 106 and third condition data 109 is finally output.
The relationship between first, second and third condition data 107, 108 and 109 and the LUTs stored in first, second and third ROMs 12, 14 and 16 can be explained as follows. First condition data 107 determines a conversion level with respect to the converting mode of the first LUT and is generally given by a user. For example, if input data is 8-bit image data, the first LUT stored in first ROM 12 is for controlling the brightness level of an image, and the brightness level can be controlled by four steps, the number of input data is 28=256, that is, from 0 to 255. The first LUT consists of 256 byte (256×8 bits) data by steps, and the first condition data consists of 2-bit data for representing the four steps.
FIG. 2A to FIG. 2C illustrate the data structure of the ROM employed for the conventional data converting device. Each LUT can compensate data in accordance with four steps in each converting mode, and the memory capacity of each ROM is divided into four regions, and converting data in accordance with each step is stored in each divided region.
As described above, the conventional data converting device connects in series a number of ROMs equal to the number of the required LUTs and sequentially reads LUT data stored in each ROM, to thereby perform a data conversion. In general, a plurality of devices included in the peripheral control circuitry of ROMs can be miniaturized into a single chip such as an application specific integrated circuit (ASIC), but ROMs for storing LUTs are not included in an ASIC, in consideration of any necessary modification of ROM contents.
Accordingly, device miniaturization is restricted and the volume of the required hardware and manufacturing cost are increased since memory devices are needed in accordance with the number of LUTs according to the kinds of converting modes.